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Linked
Bibliography of Donald Telian’s
Publications, Presentations, Awards, and Patents New
Techniques for Designing and Analyzing Multi-GigaHertz Serial Links -
DesignCon 2005 Best Paper Award finalist, defines Interconnect Storage Potential
(ISP) Understanding
and Using S-Parameters for PCB Signal Integrity -
One of Cadence’s most well-attended webinar presentations (and interview) How
to Build Fast and Accurate Multi-Gigabit Transceiver Models (and in
FPGA Journal) -
Webinar and technical article demonstrating how to quickly model advanced SerDes EETimes
Panel: Choosing the Right Gigabit
Interconnects -
Industry expert’s and 2005 survey projections on high-speed interconnects S-Parameter
Correlation of Typical PCB Interconnect Structures -
Detailed technical paper on the topic, co-written with Intel Modeling
Complex IO with IBIS 4.1 -
Next-generation modeling solutions proposed to the IBIS Open Forum in 2005 Optimizing
your Design Chain with Design Kits – Practical Advice for Kit Builders and
Users -
Technical presentation on developing design kits Surf
the Serial Wave to Success, Get
up to Multi-Gigabit Speed -
Gigabit solutions for Xilinx’ Rocket IO SerDes published in Xcell Journal PCI
Express System Simulation demonstration -
PC movie showing the correct use of design tools for PCI Express analysis (large
file) Design
Process for Source-Synchronous Applications -
Presentation on source-synchronous SI analysis -
Helpful definition posted to an SI industry forum An
Optimized Methodology for High-Speed Design -
DesignCon ’98 paper co-written with Intel at the conclusion of consulting
project Signal
Integrity Engineering in High-Speed Digital Systems -
DesignCon ’97 Best Paper Award, original work outlining the SI process and
practice Original
IBIS Specification and Inaugural
IBIS Open Forum Meeting -
IBIS beginnings organized and written by Donald Telian “Treat
pc-board traces as transmission lines to specify drive buffers”
EDN Sept. 2 1993 -
Original SI paper explaining the signaling concepts behind the PCI bus US
Patent 5,028,809 “Computer
Bus Structure Permitting Replacement of Modules During Operation” July
2, 1991
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